I am Dr. Swati Agrawal and I am proud to be a part of Bhilai Institute of Technology since 2008. I have completed my PhD from Dr C.V Raman University and MS from University of Buffalo, NY. I have more than 14 years of teaching experience along with 3 years on industrial experience in GE power systems, NY, USA. Currently I am Associate Professor in Department of Electronics and Telecommunications. I have a true passion for working with young mind and brains and training them to face challenges. Helping each student progress in all areas of their developmental ”academic, technical, research, social ,is what we strive to achieve in our institute.
Employee ID | 10201 |
Date of Joining | 01-09-2008 |
Nature of Association | Regular |
Department | Electronics and Telecommunication |
Designation | Associate Professor |
Educational Qualification | 1. Ph. D. 2. Name of PG: MS from State University of Newyork, Buffalo, USA in year 2004 3. Name of UG:BE from Bhilai Institute of Technology, 2001 |
swati.agrawal@bitdurg.ac.in | |
Contact Number | Extension No.: 503, Global Directory No.: 8189 |
VLSI Design & Verification, Embedded system, Nanotechnology
- Swati Agrawal, Dr.ShantiRathore “Area and Power Calculation of TSS LFSR And its effect on Benchmark Circuits,” i-manager’s Journal on Circuits and Systems,(JCIR), Aug 2019 , vol7, issue 3, page 6 to 10[google scholar indexed,UGC Approved, free journal]
- S.Agrawal, S.Bhardwaj, R.Nema,” Implementation of Low Area and Fast speed Multiplier for alu using Vedic Mathematics,”International Journal of Emerging Technologies and Innovative Research, Vol 6,no. 6,pp 239-244, July 2019[UGC Approved]
- S.Agrawal, S.Rathore,”Design of LFSR using Pass transistor for Low Power BIST applications”,International Journal of Emerging Technologies and Innovative Research, Vol 6, no. 6,pp 714-719, Dec 2019[UGC Approved]
- S.Agrawal, D.Singh“Effective Low power Testing Strategy with respect to Built in Self Test: A survey”,Asian Journal of Convergence in Technology, Vol: 3, no. 3. pp 207-211, 2017[google scholar] http://www.asianssr.org/index.php/ajct/article/view/207
- S.Agrawal, “Verification And Design Techniques Used In Graduate Level VHDL Course”, International Journal of Research in Electronics & Communication Technology, Vol-3, no.1,pp01-06,Jan 2015
- “FINGER PRINT RECOGNITION BASED ON FRACTAL DIMENSION”, International Journal for scientific research & development, vol 3, issue01, 2015.
- “STUDY OF ANTI-SURGE CONTROL SCHEME OF BLOWERS & DEVELOPING ANTI-SURGE CONTROL SOFTWARE USING GENERAL PURPOSE PROGRAMMABLE SINGLE LOOP CONTROLLERS”, International Journal of Applied Science Engineering and Management VOL 1, ISSUE 3, Oct 2016.
- “A REVIEW ON DIGITAL IMAGE WATERMARKING AND ITS TECHNIQUES”, International Journal for scientific research & development IJSRD, vol 4, issue10, Dec 2016 ISSN 2454-9940 NOV 2015
- S.Agrawal&M.Mittal ,“ Power and Delay Reduction of 16 bit MAC unit using Wallace Tree and Combinational Multiplier Methods using Verilog HDL,”InProc IEEE International Conference on Electrical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC), Jan 2018,pp455
- S.Agrawal, and D.Singh,“SAR Controlled logic ADC designed for Low Power Applications”, In Proc IEEE International Conference on system modeling and advancement in Research trends, Dec 2017,pp213
- WASTE RECYCLING AND ITS ENVIRONMENTAL EFFECT”, International conference on status of science and Technology in Chhattisgarh state held at BIT, Durg on March 19-20th 2015.
- Swati Agrawal, Shuchi Agawal, Agney Deshkar “ Amazon Go: A new generation shopping experience”, BITCON 2021, New Horizons in Electronics Engineering to Combat Current Challenges(20/11/2021)
- Shambhavi Tripathi, Aditi Dewangan, Alka Gupta, Dr. Swati Agarwal “IoT Paralysis Patient Healthcare System, BITCON 2021, New Horizons in Electronics Engineering to Combat Current Challenges(20/11/2021)
- Swati Agrawal,Suyash Agrawal, Tanuja Churendra eshkar “Obstruction Detection Radars”, BITCON 2020, New Horizons in Electronics Engineering to Combat Current Challenges
- S.Agrawal,“Techniques for Enhancing Reliability in VLSI Circuits,”InProcon Recent Challenges in Electronics Engineering for National Development(BITCON 2017), March 2017
- S.Agrawal, “Low Power &High Fault Coverage Test Pattern Generation using BIST”, Emerging Trends in Industrial and Consumer Electronics, (BITCON) Jan 2016.
- S.Agrawal “Choosing Of Career”, National conference on Emerging issues in managing organization for global competitiveness (BITCON-2008) held at BIT Durg.
- S.Agrawal “Influence Of American English On The World”, National conference on Communication competence for professionals (BITCON-2008) held at BIT, Durg.
- Year 2016-2017 : 2 Week ISTE STTP on CMOS mixed signal and RF VLSI Design, 26th Dec to 4th Feb 2017), Conducted by IIT Kharagpur
- National Workshop on Scientific Paper Writing, 1 day(15th Oct 2016), BIT, Durg
- Year 2017-2018: AICTE/ISTE Induction/refresher program on “Academic Leadership Development programme for Aspiring Leaders” 4th June 2018-9th June 2018 Faculty Development programme on Foundation in ICT for Education conducted by Indian Institute of Technology, Bombay from August 3, 2017 to September 7, 2017.
- Two-Week AICTE approved FDP on ''Pedagogy for Online and Blended Teaching-Learning Process from 14 September to 12 October 2017 Conducted by IIT Bombay, 14 September to 12 October 2017.2018-2019
- Training design on Recent Trends in VLSI design using Microwind 3.8 EDA tool, conducted by CSVTU, on 9th April 2019
- Trends and Challenges in Industry Academia Collaboration , TEQIP conducted by Electrical Engineering department, BIT Durg on 21st to 25th January 2019. 2019-2020
- Advancements in Electric Drives and Control and their socio-Environmental Impacts, TEQIP conducted by Electrical Engineering department, BIT Durg, from 4th to 16th Nov 2019
- Participated in one day Scientific paper writing workshop , Oct 15 2016
- Participated in Two Week ISTE workshop on Signals and Systems conducted by IIT Kharagpur (2nd-12th January 2014)
- Participated in Two Week ISTE workshop on Analog Electronics conducted by IIT Kharagpur(4th to 14th June 2013)
- Participated in Two days ISTE workshop on Research Methods in Educational Technology, conducted by IIT Bombay (2nd Feb 2013 and 9th Feb 2013)
- Participated in “Electronic System Design and Manufacturing: Energy Efficient Electronic Products Design” organized by Government of India, Ministry Of Communication & IT, on August 25 2012.
- Participated in AICTE Sponsored National seminar on “Advances in Environmental Science and Engineering on 8th -9th Jan2009
- Attended workshop for Staff Development program held in Civil Department, BIT in “Environmental Monitoring for Sustainable Development”.
- Organized workshop on “VLSI Technology and its Applications” Dec 2010
Publications in International Journal
Publications in International/National Conference
FDP/Workshop details
Workshops:
STTP/ Workshop/ FDP Attended
Name of the STTP/Workshop |
Organized by |
Place |
Duration |
|
Advancements in Electric Drives and Control and their socio-Environmental Impacts |
TEQUIP |
BIT DURG |
2 weeks 4th to 16th 2019 |
|
5 day FDP on IOT Applications |
Vikas Group of Institutions and approved by AICTE, Webinar Online |
1st June 2020 to 5th June 2020 |
||
WEBINAR on NAAC Assessment |
Sathyabhama Institute of Science and Technology, Chennai. Webinar Online |
13th June 2020 |
||
RECENT TRENDS AND RESEARCH AVENUES IN MICROELECTRONICS AND VLSI |
CSVTU, BHILAI SPONSORED BY TEQUIP |
28TH JULY 2020 |
||
NARROWING DISTANCE LEARNING THROUGH MORGAN AND CLAYPOOL E-BOOK COLLECTION |
IEEE INDIAN OPERATIONS,IEEE |
21ST JULY 2020 |
||
NEW ROLE OF MICROWAVES IN DEFENSE |
BHARAT INSTITUTE OF ENGINEERING AND TECHNOLOGY, NEW DELHI |
1 WEEK (20-7-2020 TO 25-7-2020) |
||
Control Systems and sensor technology |
ATAL Academy |
1 week (2/11/2020 to 6/11/2020) |
||
IEEE Xplore: Delivering research better than ever |
IEEE Client Service Team |
23/06/2020 |
||
ESIM |
BIT, Durg |
21/09/2019 |
Other Responsibilities:
- Member of Board of Studies for Electronics and Telecommunication branch 2020.
- Member of Literary Committee “Panorama”: The institute’s yearly Subscription
- Ojas Coordinator for Face of Ojas 2019
- Organizing secretary BITCON 2020 for ETC Department
- NBA Compliance Accreditation In charge for session 2019-2020
- Departmental Alumni Incharge
- CT Incharge both BE and M.Tech
- M.Tech CSD Lab Incharge
- VLSI lab Incharge
- Departmental Ojas Coordinator at the Institute Level for year 2019
- Event Coordinator for Technical Paper Presentation in Ojas’19
- Organized 3rd semester induction programme
- Organized Farewell Programme at Institute Level
Details of contribution to the Institutional Activity –
Details of contribution to the Departmental Activity –
From |
To |
Administrative Position |
Major responsibility |
Sept 2008 |
Nov 2010 |
Assistant Training and Placement Officer |
Placement work of the campus |
July 2017 |
June 2018 |
Member of Website Committee |
Updation & Maitenance of Depertmental Web page. |
July 2018 |
June 2019 |
Member of Literary Committee |
Editing of Institute's Yearly Magazine "Panaroma" |
Felowship/Awards/Other recognitions: